What's the difference between CMOS 4000 logic and TTL 7400 logic?
In the present day much digital circuitry is implemented on large gate arrays, but you will find that older circuit designs in EE classes, textbooks, and other sources will show one of two families of discrete logic chips: the CD4000 CMOS series and the TTL 7400 series. The same NAND, NOR, and other logic functions are found in both families, so which should you use? Can they be mixed?
A detailed discussion of the underlying technology can be found elsewhere, but a few practical comments will cover the critical issues.
POWER SUPPLY:most 4000 series CMOS chips can be operated with supply voltages as high as 15 VDC. (Check the data sheet.) TTL 7400 chips cannot be operated at more than 5.5 VDC without damage.
POWER CONSUMPTION:Generally speaking, 4000 series CMOS use less current and power than TTL chips.
CURRENT OUTPUT: CMOS gates and TTL outputs differ in how much current they can "source" (supply when the output when "high") and "sink" (supply when they are low). When an output has to drive a lot of inputs or a load like an LED, knowing this specification gets critical. (It also explains why you see a lot of circuits that drive heavier loads using a "0" to activate the load: TTL chips generally can "sink" much more than they "source".)
VALID LOGIC LEVELS:This is a bit more subtle and can "bite you" if you don't expect it. In CMOS 4000 lologic, a "high" or "1" is defined as meeting or exceeding 2/3 of the supply voltage, which is 3.3 VDC with a 5 volt supply, and a "low" is defined as less than 1/3 the supply voltage - 1.6 volts with a 5 volt supply. By contrast, in TTL, a valid high must only exceed 2.8 VDC, while a valid low needs to be less than .8 volts. So, for example, a TTL gate may be putting out a "high" that is lower than what a CMOS gate "wants" to see as a high input. If a TTL gate isn't driving more than one or two inputs, it probably will put out almost 5 volts as a "high" and this is not a problem, but if it is driving a lot of load, you may need a pull-up resistor or a buffer to make sure that there is a valid "1" going out to the rest of your circuit. If you are mixing CMOS and TTL, be sure you check logic levels with an oscilloscope, not just a logic probe, so you can see if you are getting 1s and 0s that are sufficiently "high" and "low" for the logic requirements.